1. Field of the Invention
The present invention disclosed herein relates to a semiconductor memory device, and more particularly, to a voltage regulator for a semiconductor memory device.
2. Description of the Related Art
Generally, a flash memory device needs a high voltage for programming and erasing data. Such a high voltage is generated through a charge pumping circuit provided in the flash memory device. The charge pumping circuit generates the high voltage by boosting an internal voltage Vcc using well-known charge pumping methods. Hereinafter, the high voltage, which has been boosted by the charge pumping circuit, is referred to as a pumping voltage. In general, the pumping voltage is outputted as a regulated voltage Vreg through a switching circuit such as a pass gate or the like. The regulated voltage Vreg is divided by a voltage divider. The divided voltage Vdiv is compared with a reference voltage Vref, and the switching circuit is then controlled depending on the comparison result. Consequently, the regulated voltage Vreg is maintained at a constant level through a feedback loop of the comparing and switching operations, and thus it can be supplied as a word line voltage having stable waveform such as a program voltage Vpgm, a program verify voltage Vvfy or the like.
However, besides the above-described method for generating the regulated voltage Vreg from the pumping voltage, a forcing mode, which directly receives a high voltage from an external source and then supplies it as a regulated voltage Vreg, is additionally provided in a NOR type flash memory device. For example, such a mode may include an accelerated program operation mode. In a mode where an external high voltage is provided, the high voltage is abruptly applied inward, which may cause the instability of the regulated voltage Vreg due to the large amount of input current. An overshoot and its resulting ripple voltage are representative features of the instability of the regulated voltage Vreg. FIG. 1 is a waveform diagram illustrating the instability of the regulated voltage Vreg generated when the external high voltage is provided. Referring to FIG. 1, a regulated voltage Vreg_pump generated by using a pumping voltage Vpp_pump has a gradually ascending slope without the overshoot and the ripple. That is, the regulated voltage Vreg_pump has a stable waveform that continuously rises up to a predetermined point that the pumping voltage Vpp_pump reaches a predetermined level from a start point (t=0) when the high voltage begins to be supplied. This waveform is ascribed to a predetermined time taken for boosting a voltage up to the high voltage through the charge pumping operation at the starting point when the high voltage begins to be supplied.
However, an external high voltage Vpp_ext provided from an external power source is always maintained at a constant voltage level, and a relatively high current is provided to the regulator circuit at a switching point. When the external high voltage has a predetermined waveform having a steep slope like a step pulse, the regulator circuit has a time response characteristic like an impulse wave. Therefore, a regulated voltage Vreg_ext obtained by regulating the external high voltage Vpp_ext has a short rising time, but it must be accompanied by an overshoot having a peak at time T1 and its resulting ripple. Herein, the ripple is due to a sensing delay due to the aforementioned feedback operation. An internal operation (e.g., program or verify operation) using the regulated voltage will begin because it is determined that the regulated voltage reaches a target voltage at time T1. However, when the regulated voltage Vreg is provided as the internal operation voltage (e.g., Vpgm, Vvfy, etc) at time T2, the regulated voltage lower than the target voltage will be supplied. When a program fail occurs due to the overshoot and the ripple, the number of iterations of a program loop is inevitably increased. This phenomenon is not merely limited to the program operation. For instance, the overshoot and the ripple may cause an operational error in the program verify operation, reading operation, and so forth.